In general, a material is in one of a solid, liquid or gaseous state according to the temperature and pressure. For example, as pressure increases under a constant temperature, gas can be generally liquefied. However, above a critical temperature and pressure, a material can be in the supercritical state, and the material may not be liquefied regardless of a further increase of pressure. In a phase diagram, the minimum temperature and pressure from which the supercritical state starts is generally referred to as the “critical point.”
When carbon dioxide (CO2), for example, is fed into a closed container and heated to a temperature and pressure exceeding the critical point, in general, the boundary between gas and liquid disappears. Unlike the properties of a typical liquid solvent, the physical properties of a material in the supercritical state (hereinafter referred to as “supercritical fluid”), for example, density, viscosity, diffusion coefficient, polarity and the like, can be continuously changed from gas-like to liquid-like as the pressure is varied.
Supercritical fluid may have a high dissolution, a high diffusion coefficient, low viscosity and low surface tension. Therefore, as a method for overcoming technical problems related with the efficiency, quality, reaction rate and environment in a typical process (such as reaction, decomposition, extraction, distillation, crystallization, absorption, adsorption, drying and cleaning), technologies employing supercritical fluid can be used. Carbon dioxide may be a particularly useful material for, e.g., a process of manufacturing a capacitor constituting a memory cell of a dynamic random access memory (DRAM), because, at least in part, it has a critical temperature of 31° C. and a critical pressure of 73 atm, and is also generally nontoxic, nonflammable and inexpensive. For instance, Korean Patent Laid Open Publication No. 2005-0074844 discusses a method of manufacturing a microelectronic device including removing a thin film using supercritical carbon dioxide as a solvent. Hereinafter, a process of manufacturing a capacitor using a conventional method and a problem caused, at least in part, by the process will be described with reference to FIGS. 2 and 3. More specifically, FIG. 2 is a sectional view of memory cells of a conventional DRAM device, and FIG. 3 is a process flow diagram illustrating a method of manufacturing a DRAM device according to the related art.
Again referring to FIGS. 2 and 3, a lower structure 20 is formed on a semiconductor substrate 10 (S1). The lower structure 20 includes transistors 30, interconnection line structures 40 connecting the transistors 30, and an interlayer insulating layer 50 disposed between the transistors 30 and the interconnection line structures 40. Each of the transistors 30 includes a gate electrode 31 disposed on the semiconductor substrate 10, and impurity regions 32 formed in the semiconductor substrate 10 at both sides of the gate electrode 31. Each of the interconnection line structures 40 include a lower plug 41, an interconnection line layer 42 on the lower plug 41, and an upper plug 43 on the interconnection line layer 42. Also, the interlayer insulating layer 50 includes a lower interlayer insulating layer 51 and an upper interlayer insulating layer 52, which are sequentially stacked.
Thereafter, a first sacrificial layer 60 is formed on the lower structure 20 and is patterned to form openings 65 which expose the upper plugs 43 (S2). The first sacrificial layer 60 typically includes silicon oxide, and the upper interlayer insulating layer 52 includes a material that provides an etch selectivity for the first sacrificial layer 60. Owing to the etch selectivity, the openings 65 can be formed with a large aspect ratio (h/w), as shown in the drawing, with no or minimal damage to the lower structure 20.
Next, a lower electrode layer is formed in the openings 65, and then a second sacrificial layer 80 fills the openings 65 on which the lower electrode layer was formed. The second sacrificial layer 80 generally includes silicon oxide. Thereafter, the second sacrificial layer 80 and the lower electrode layer are etched until an upper surface of the first sacrificial layer 60 is exposed. As a result, the lower electrodes 70 of a capacitor constituting a memory cell of a DRAM device may be formed (S3) as shown in FIG. 2.
According to methods known in the art, the first and second sacrificial layers 60 and 80 are removed by a wet etch to expose the sidewalls of the lower electrodes 70 (S4). Thereafter, the resultant structure is cleaned using a cleaning solution to remove by-products generated in the etching process (S5). However, because the etching solution or cleaning solution used in these processes can have a surface tension of a few tens of dynes/cm, the flow of the etching solution or cleaning solution can cause the lower electrodes 70 having the large aspect ratio to lean.
In experiments etching silicon oxide using an etchant including a supercritical carbon dioxide as a solvent, and hydrofluoric acid (HF) and pyridine as etching chemicals, as shown in FIGS. 8A and 8B, it was found that etching by-products are generated from the HF and pyridine, which can be removed using de-ionized water. However, this cleaning can cause the lower electrode to lean. Therefore, methods are needed to prevent the leaning of the lower electrodes in this process.